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| - | ====== Papers ====== | + | ====== Papers |
| - | ====== Semi-invasive attacks - A new approach to hardware security analysis | + | ===== Semi-invasive attacks - A new approach to hardware security analysis ===== |
| * Sergei P. Skorobogatov | * Sergei P. Skorobogatov | ||
| * University of Cambridge | * University of Cambridge | ||
| Line 8: | Line 8: | ||
| Detailed overview of the entire process. Highly recommended. | Detailed overview of the entire process. Highly recommended. | ||
| - | ====== The State-of-the-Art in IC Reverse Engineering | + | ===== The State-of-the-Art in IC Reverse Engineering ===== |
| http:// | http:// | ||
| Has some history and current techniques. | Has some history and current techniques. | ||
| - | ====== Reverse Engineering Complex Application Specific Integrated Circuits (ASICs) | + | ===== Reverse Engineering Complex Application Specific Integrated Circuits (ASICs) ===== |
| http:// | http:// | ||
| Basic overview of IC RE process | Basic overview of IC RE process | ||
| - | ====== Integrated circuit failure analysis: a guide to preparation techniques | + | ===== Integrated circuit failure analysis: a guide to preparation techniques ===== |
| * part of failure analysis, chips must be decapped. Provides industrial grade walkthrough of how to decap chips | * part of failure analysis, chips must be decapped. Provides industrial grade walkthrough of how to decap chips | ||
| * ISBN-10: 0471974013 | * ISBN-10: 0471974013 | ||
| * ISBN-13: 978-0471974017 | * ISBN-13: 978-0471974017 | ||
| - | ====== Building a High-Performance, | + | ===== Building a High-Performance, |
| http:// | http:// | ||
| - | ====== Presentations ====== | + | ====== Presentations ====== |
| - | ====== 25C3 IC Reverse Engineering | + | ===== 25C3 IC Reverse Engineering ===== |
| Karsten Nohl | Karsten Nohl | ||
| http:// | http:// | ||
| - | ====== VLSI CAD: Logic to layout | + | ===== VLSI CAD: Logic to layout ===== |
| http:// | http:// | ||
| Class with some web resources on how to convert logic gates to silicon masks | Class with some web resources on how to convert logic gates to silicon masks | ||
| + | |||
| + | ===== Texplained: Hardware Reverse-engineering Tools new threats - new oppertunities ===== | ||
| + | |||
| + | Olivier Thomas | ||
| + | |||
| + | http:// | ||
| + | |||
| + | ===== Backside IC analysis ===== | ||
| + | |||
| + | Dmitry Nedospasov | ||
| + | |||
| + | http:// | ||
| + | |||
| ====== Blog ====== | ====== Blog ====== | ||
| - | ====== CHIPWORKS blog ====== | + | ===== CHIPWORKS blog ===== |
| http:// | http:// | ||
| - | ====== Flylogic blog ====== | + | ===== Flylogic blog ===== |
| http:// | http:// | ||
| Line 50: | Line 63: | ||
| ====== Misc ====== | ====== Misc ====== | ||
| - | ====== A guide to interpreting logic by Alex Rad ====== | + | ===== A guide to interpreting logic by Alex Rad ===== |
| [[http:// | [[http:// | ||
| - | ====== ESD ====== | + | ===== ESD ===== |
| http:// | http:// | ||
| - | ====== Hacking smart cards ====== | + | ===== Hacking smart cards ===== |
| http:// | http:// | ||
| Line 64: | Line 77: | ||
| http:// | http:// | ||
| - | ====== Logic gates (esp inverters) | + | ===== Logic gates (esp inverters) ===== |
| http:// | http:// | ||
| - | ====== CMOS storage teardown | + | ===== CMOS storage teardown ===== |
| http:// | http:// | ||
resources.1329728100.txt.gz · Last modified: 2013/10/20 14:59 (external edit)
