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mcmaster:efabless:sky130-mpw1-wafer

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mcmaster:efabless:sky130-mpw1-wafer [2025/06/25 20:45] – mcmastermcmaster:efabless:sky130-mpw1-wafer [2025/08/04 21:23] (current) – external edit 127.0.0.1
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-[[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_mz_mit1x/|mz_mit1x]]+[[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/mcmaster_mz_mit1x/|mz_mit1x]]
  
-  * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_mz_mit1x.jpg|Single]] (43032x42654, 422.626MiB)+  * [[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_mz_mit1x.jpg|Single]] (43032x42654, 422.626MiB)
  
-{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi01_mit2x2.thumb.jpg}}+{{https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi01_mit2x2.thumb.jpg}}
  
-[[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi01_mit2x2/|mz_roi01_mit2x]]+[[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi01_mit2x2/|mz_roi01_mit2x]]
  
-  * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi01_mit2x2.jpg|Single]] (18204x4372, 13.9952MiB)+  * [[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi01_mit2x2.jpg|Single]] (18204x4372, 13.9952MiB)
  
-{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi03_mit2x2.thumb.jpg}}+{{https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi03_mit2x2.thumb.jpg}}
  
-[[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi03_mit2x2/|mz_roi03_mit2x2]]+[[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi03_mit2x2/|mz_roi03_mit2x2]]
  
-  * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi03_mit2x2.jpg|Single]] (17902x5713, 18.8183MiB)+  * [[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi03_mit2x2.jpg|Single]] (17902x5713, 18.8183MiB)
  
-{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi05_mit2x2.thumb.jpg}}+{{https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi05_mit20x2.thumb.jpg}}
  
-[[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi05_mit20x2/|mz_roi05_mit20x2]]+[[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi05_mit20x2/|mz_roi05_mit20x2]]
  
-  * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi05_mit20x2.jpg|Single]] (19560x5918, 11.6516MiB)+  * [[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi05_mit20x2.jpg|Single]] (19560x5918, 11.6516MiB)
  
-{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi06_mit2x2.thumb.jpg}}+{{https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi06_mit20x2.thumb.jpg}}
  
-[[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi06_mit20x2/|mz_roi06_mit20x2]]+[[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi06_mit20x2/|mz_roi06_mit20x2]]
  
-  * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi06_mit20x2.jpg|Single]] (21503x14584, 90.7857MiB)+  * [[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi06_mit20x2.jpg|Single]] (21503x14584, 90.7857MiB)
  
-[[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi08_mit20x2/|mz_roi08_mit20x2]]+{{https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi08_mit20x2.thumb.jpg}}
  
-  * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi08_mit20x2.jpg|Single]] (3327x10238, 3.24921MiB)+[[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi08_mit20x2/|mz_roi08_mit20x2]]
  
-{{https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi09_mit2x2.thumb.jpg}}+  * [[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi08_mit20x2.jpg|Single]] (3327x10238, 3.24921MiB)
  
-[[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi09_mit20x2/|mz_roi09_mit20x2]]+{{https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi09_mit20x2.thumb.jpg}}
  
-  * [[https://siliconpr0n.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi09_mit20x2.jpg|Single]] (22589x14973, 54.8096MiB)+[[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/mcmaster_4205819-04-e1_mz_roi09_mit20x2/|mz_roi09_mit20x2]] 
 + 
 +  * [[https://siliconprawn.org/map/efabless/sky130-mpw1-wafer/single/efabless_sky130-mpw1-wafer_mcmaster_4205819-04-e1_mz_roi09_mit20x2.jpg|Single]] (22589x14973, 54.8096MiB)
  
mcmaster/efabless/sky130-mpw1-wafer.1750884309.txt.gz · Last modified: 2025/06/25 20:45 by mcmaster